RasPi Direct Hardware Access
Integrated peripheral access without operating system drivers.
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hw.h File Reference

Declarations for all publicly known (as of 08/2013) Raspberry Pi hardware registers. More...

#include <stdint.h>

Go to the source code of this file.

Data Structures

struct  raspi_AUX_regs
 Auxillary peripherals generic configuration. More...
 
struct  raspi_UART1_regs
 Auxillary mini UART (= UART1). More...
 
struct  raspi_SPI1_regs
 Auxillary mini SPI 0 (= SPI1). More...
 
struct  raspi_BSC0_regs
 BSC0 (I2C0) master. More...
 
struct  raspi_dma_control_block
 DMA control block. More...
 
struct  raspi_DMA15_regs
 DMA channel 15. More...
 
struct  raspi_DMA_GLOBAL_regs
 DMA global control. More...
 
struct  raspi_RNG_regs
 Hardware Random Number Generator. More...
 
struct  raspi_EMMC_regs
 External Mass Media Controller (MMC/SD/SDIO). More...
 
struct  raspi_GPIO_regs
 General-Purpose I/O. More...
 
struct  raspi_GPCLK_regs
 General Purpose Clock. More...
 
struct  raspi_IRQ_regs
 Interrupt Controller. More...
 
struct  raspi_PCM_regs
 PCM / I2S Audio. More...
 
struct  raspi_PWM_regs
 Pulse Width Modulator. More...
 
struct  raspi_SPI0_regs
 Serial Peripheral Interface master (SPI0). More...
 
struct  raspi_BSCSL_regs
 BSC/SPI slave. More...
 
struct  raspi_ST_regs
 System Timer. More...
 
struct  raspi_UART0_regs
 ARM UART (UART0). More...
 
struct  raspi_TIMER_regs
 ARM Timer. More...
 
struct  raspi_USB_regs
 USB controller. More...
 
struct  raspi_MMC_regs
 Legacy MMC Controller. More...
 
struct  raspi_CM_reg
 Clock Management. More...
 
struct  raspi_PM_regs
 Power/Reset Management. More...
 
struct  raspi_peripherals
 Contains all perpherals declared in this file. More...
 
union  raspi_RNG_regs.CTRL
 
struct  raspi_RNG_CTRL_reg.CTRL.B
 
union  raspi_RNG_regs.STATUS
 
struct  raspi_RNG_STATUS_reg.STATUS.B
 
union  raspi_RNG_regs.FF_THRES
 
struct  raspi_RNG_FF_THRES_reg.FF_THRES.B
 
union  raspi_RNG_regs.INT_MASK
 
struct  raspi_RNG_INT_MASK_reg.INT_MASK.B
 
struct  raspi_GPCLK_regs.CM
 
union  raspi_PCM_regs.CS
 
struct  raspi_PCM_CS_reg.CS.B
 
union  raspi_PCM_regs.MODE
 
struct  raspi_PCM_MODE_reg.MODE.B
 
union  raspi_PCM_regs.RXC
 
struct  raspi_PCM_RXC_reg.RXC.B
 
union  raspi_PCM_regs.TXC
 
struct  raspi_PCM_TXC_reg.TXC.B
 
union  raspi_PCM_regs.DREQ
 
struct  raspi_PCM_DREQ_reg.DREQ.B
 
union  raspi_PCM_regs.INTEN
 
struct  raspi_PCM_INTEN_reg.INTEN.B
 
union  raspi_PCM_regs.INTSTC
 
struct  raspi_PCM_INTSTC_reg.INTSTC.B
 
union  raspi_PCM_regs.GRAY
 
struct  raspi_PCM_GRAY_reg.GRAY.B
 
union  raspi_SPI0_regs.CS
 
struct  raspi_SPI0_CS_reg.CS.B
 
union  raspi_SPI0_regs.CLK
 
struct  raspi_SPI0_CLK_reg.CLK.B
 
union  raspi_SPI0_regs.DLEN
 
struct  raspi_SPI0_DLEN_reg.DLEN.B
 
union  raspi_SPI0_regs.LTOH
 
struct  raspi_SPI0_LTOH_reg.LTOH.B
 
union  raspi_SPI0_regs.DC
 
struct  raspi_SPI0_DC_reg.DC.B
 
union  raspi_ST_regs.CS
 
struct  raspi_ST_CS_reg.CS.B
 
union  raspi_UART0_regs.DR
 
struct  raspi_UART0_DR_reg.DR.B
 
union  raspi_UART0_regs.RSRECR
 
struct  raspi_UART0_RSRECR_reg.RSRECR.B
 
union  raspi_UART0_regs.FR
 
struct  raspi_UART0_FR_reg.FR.B
 
union  raspi_UART0_regs.IBRD
 
struct  raspi_UART0_IBRD_reg.IBRD.B
 
union  raspi_UART0_regs.FBRD
 
struct  raspi_UART0_FBRD_reg.FBRD.B
 
union  raspi_UART0_regs.LCRH
 
struct  raspi_UART0_LCRH_reg.LCRH.B
 
union  raspi_UART0_regs.CR
 
struct  raspi_UART0_CR_reg.CR.B
 
union  raspi_UART0_regs.IFLS
 
struct  raspi_UART0_IFLS_reg.IFLS.B
 
union  raspi_UART0_regs.IMSC
 
struct  raspi_UART0_IMSC_reg.IMSC.B
 
union  raspi_UART0_regs.RIS
 
struct  raspi_UART0_RIS_reg.RIS.B
 
union  raspi_UART0_regs.MIS
 
struct  raspi_UART0_MIS_reg.MIS.B
 
union  raspi_UART0_regs.ICR
 
struct  raspi_UART0_ICR_reg.ICR.B
 
union  raspi_UART0_regs.ITCR
 
struct  raspi_UART0_ITCR_reg.ITCR.B
 
union  raspi_UART0_regs.ITIP
 
struct  raspi_UART0_ITIP_reg.ITIP.B
 
union  raspi_UART0_regs.ITOP
 
struct  raspi_UART0_ITOP_reg.ITOP.B
 
union  raspi_UART0_regs.TDR
 
struct  raspi_UART0_TDR_reg.TDR.B
 
union  raspi_CM_reg.CTL
 
struct  raspi_CM_CTL_reg.CTL.B
 
union  raspi_CM_reg.DIV
 
struct  raspi_CM_DIV_reg.DIV.B
 
union  raspi_PM_regs.RSTC
 
struct  raspi_PM_RSTC_reg.RSTC.B
 
union  raspi_PM_regs.RSTS
 
struct  raspi_PM_RSTS_reg.RSTS.B
 
union  raspi_PM_regs.WDOG
 
struct  raspi_PM_WDOG_reg.WDOG.B
 

Macros

#define AUX_OFFSET   0x215000
 AUX register offset.
 
#define UART1_OFFSET   0x215040
 UART1 register offset.
 
#define SPI1_OFFSET   0x215080
 SPI1 register offset.
 
#define SPI2_OFFSET   0x2150c0
 SPI2 register offset.
 
#define BSC0_OFFSET   0x205000
 BSC0 register offset.
 
#define BSC1_OFFSET   0x804000
 BSC1 register offset.
 
#define BSC2_OFFSET   0x805000
 BSC2 register offset.
 
#define DMA15_OFFSET   0xe05000
 DMA 15 register offset.
 
#define DMA_OFFSET   0x007000
 DMA 0-14 register offset.
 
#define DMA_GLOBAL_OFFSET   0x007fe0
 DMA_GLOBAL register offset.
 
#define RNG_OFFSET   0x104000
 RNG register offset.
 
#define EMMC_OFFSET   0x300000
 EMMC register offset.
 
#define GPIO_OFFSET   0x200000
 GPIO register offset.
 
#define GPCLK_OFFSET   0x101070
 GPCLK register offset.
 
#define IRQ_OFFSET   0x00b200
 IRQ register offset.
 
#define PCM_OFFSET   0x203000
 PCM register offset.
 
#define PWM_OFFSET   0x20c000
 PWM register offset.
 
#define SPI0_OFFSET   0x204000
 SPI0 register offset.
 
#define BSCSL_OFFSET   0x214000
 BSCSL register offset.
 
#define ST_OFFSET   0x003000
 ST register offset.
 
#define UART0_OFFSET   0x201000
 UART0 register offset.
 
#define TIMER_OFFSET   0x00b400
 TIMER register offset.
 
#define USB_OFFSET   0x980000
 USB register offset.
 
#define MMC_OFFSET   0x202000
 MMC register offset.
 
#define CM_PASSWD   (0x5a)
 Password for the PASSWD field of various Clock Manager registers.
 
#define CM_OFFSET   0x101000
 CM register offset.
 
#define PM_PASSWD   (0x5a)
 Password for the PASSWD field of various Power Management registers.
 
#define PM_OFFSET   0x100000
 PM register offset.
 
#define HW   (*pHW)
 Accessor to parent structure containing all hardware peripherals. More...
 
#define CORE_CLOCK   250000000
 Clock frequency in Hz of the APB (Advanced Peripheral Bus).
 
#define memory_barrier()   asm volatile ("mcr p15, #0, %[zero], c7, c10, #5" :: [zero] "r" (0))
 Stall any following memory access until those before this call have completed. Always call this after using a peripheral or in between using two different peripherals! The peripheral bus may mangle your memory accesses otherwise.
 
#define synchronization_barrier()   asm volatile ("mcr p15, #0, %[zero], c7, c10, #4" :: [zero] "r" (0))
 Stall execution until all pending memory accesses have completed.
 
#define ARM(x)   ((x)+0x20000000ul)
 Map peripheral register offset to physical address space as seen by the ARM CPU.
 
#define BUS(x)   ((x)+0x7e000000ul)
 Map peripheral register offset to bus addresses as seen by the DMA controller and other peripherals.
 
#define ST_NOW   ((st_time_t)HW.ST.CLO)
 Return current system timer timestamp. It measures time independent of clock scaling.
 
#define ST_1s   ((st_delta_t)1000000)
 System timer frequency in Hz (== timer ticks in 1 s)
 
#define ST_1ms   (ST_1s/1000)
 System timer ticks in 1 ms.
 
#define ST_1us   (ST_1s/1000000)
 System timer ticks in 1 µs.
 

Typedefs

typedef raspi_SPI1_regs raspi_SPI2_regs
 Auxillary mini SPI1 (= SPI2). More...
 
typedef raspi_BSC0_regs raspi_BSC1_regs
 BSC1 (I2C1) master. More...
 
typedef raspi_BSC0_regs raspi_BSC2_regs
 BSC2 (I2C2) master. More...
 
typedef raspi_DMA15_regs raspi_DMA_regs [15]
 DMA channels 0-14. More...
 
typedef raspi_CM_reg raspi_CM_regs [57]
 Clock Manager register array.
 
typedef uint32_t st_time_t
 Type for system timer time stamps.
 
typedef uint32_t st_delta_t
 Type for system timer time stamp differences.
 

Enumerations

enum  raspi_CM_CTL_SRC_t {
  CM_GND = 0, CM_OSC = 1, CM_PLLA = 4, CM_PLLC = 5,
  CM_PLLD = 6, CM_HDMI = 7
}
 Clock manager sources.
 
enum  raspi_CM_reg_t {
  CM_VPU = 1, CM_H264 = 5, CM_UNK_0x30 = 6, CM_V3D = 7,
  CM_CAM0_LP = 8, CM_DSI_ESC = 11, CM_DPI = 13, CM_GP0 = 14,
  CM_GP1 = 15, CM_GP2 = 16, CM_HSM = 17, CM_ISP = 18,
  CM_PCM = 19, CM_PWM = 20, CM_SLIM = 21, CM_SMI = 22,
  CM_EMMC = 24, CM_TSENS = 28, CM_TIME = 29, CM_UART = 30,
  CM_VEC = 31, CM_UNK_0x190 = 50, CM_ARM = 54, CM_UNK_0x1C0 = 56
}
 Known clock manager entries.
 
enum  raspi_PM_RSTC_WRCFG_t { PM_CLR = 0, PM_SET = 1, PM_FULL_RESET = 2 }
 Possible values for `HW.PM.RSTC.B.WRCFG`.
 
enum  raspi_GPIO_function {
  Input = 0, Output = 1, Alt0 = 4, Alt1 = 5,
  Alt2 = 6, Alt3 = 7, Alt4 = 3, Alt5 = 2
}
 Select between GPIO input, GPIO output, or one of the alternate (peripheral) functions.
 

Functions

int raspi_map_hw (void)
 Map the hardware registers into the current user-space process. Return true if successful, false on error.
 
static void gpio_configure (int gpio, raspi_GPIO_function function)
 Configure GPIO gpio for function function.
 
static void gpio_set (int gpio)
 Set (to logical high) GPIO output gpio.
 
static void gpio_clear (int gpio)
 Clear (set to logical low) GPIO output gpio.
 
static uint32_t gpio_read (int gpio)
 Return true (but not neccessarily 1) if GPIO input gpio is driven high.
 
static int st_elapsed (st_time_t before, st_time_t after, st_delta_t diff)
 Return true if after is at least diff ticks after before.
 
static void st_delay (st_delta_t delay)
 Busy-wait for the given delay.
 

Variables

raspi_peripheralspHW
 Hardware registers base pointer. See HW.
 

Detailed Description

Declarations for all publicly known (as of 08/2013) Raspberry Pi hardware registers.

License

Copyright (c) 2013 OFFIS e.V.

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.


Data Structure Documentation

struct raspi_peripherals

Contains all perpherals declared in this file.

See HW for suggested usage.

Documentation taken from the official data sheet and https://github.com/hermanhermitage/videocoreiv/wiki/Register-Documentation

Macro Definition Documentation

#define HW   (*pHW)

Accessor to parent structure containing all hardware peripherals.

For example, the UART0 line control register can be accessed as HW.UART0.LCRH. To access the register as a single 32-bit unsigned value, use HW.UART0.LCRH.U. To access just the parity enable bit PEN, use HW.UART0.LCRH.B.PEN.

Names follow those listed in the official datasheet, with common prefixes and suffixes (if any) removed. See Register Declarations for a list of available entries.