spisl.h

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#ifndef RASPI_SPISL_H
#define RASPI_SPISL_H

#include "raspi/hw.h"
#include <stdint.h>


static inline void spisl_init()
{
    int i;

    struct raspi_PCM_CS_reg init_cs = {
        .TXCLR = 1,
        .RXCLR = 1,
        .TXERR = 1,
        .RXERR = 1,
        .TXON = 1,
        .RXON = 1,
        .SYNC = 1,
        .STBY = 1,
        .EN = 1,
    };

    const struct raspi_PCM_MODE_reg mode_master = {
        .FLEN = 7,
        .FSLEN = 7,
        .CLKM = 0,
        .CLKI = 0,
        .FSM = 0,
        .FSI = 0,
        .CLK_DIS = 1,
    };

    const struct raspi_PCM_MODE_reg mode_slave = {
        .FLEN = 7,
        .FSLEN = 7,
        .CLKM = 1,
        .CLKI = 0,
        .FSM = 1,
        .FSI = 1,
        .CLK_DIS = 1,
    };

    const struct raspi_CM_CTL_reg pcm_cm_ctl = {
        .PASSWD = CM_PASSWD,
        .SRC = CM_OSC,
        .MASH = 1,
        .ENAB = 1,
    };

    const struct raspi_CM_DIV_reg pcm_cm_div = {
        .PASSWD = CM_PASSWD,
        .DIVI = 250,
    };

    // disable interface for reconfiguration
    for (i = 28; i <= 31; i++) gpio_configure(i, Input);
    memory_barrier();

    // empty FIFO
    while (HW.PCM.CS.B.RXD) (void)HW.PCM.FIFO;

    // disable module to reset all parameters
    HW.PCM.CS.B.EN = 0;
    st_delay(ST_1ms);

    // set desired transmission parameters
    HW.PCM.RXC.U = 0;
    HW.PCM.TXC.U = 0;
    HW.PCM.INTEN.U = 0;
    HW.PCM.INTSTC.U = 15;
    HW.PCM.GRAY.U = 0;

    HW.PCM.RXC.B.CH1WEX = 0;
    HW.PCM.RXC.B.CH1POS = 0;
    HW.PCM.RXC.B.CH1WID = 0;
    HW.PCM.RXC.B.CH1EN = 1;

    HW.PCM.TXC.B.CH1WEX = 0;
    HW.PCM.TXC.B.CH1POS = 0;
    HW.PCM.TXC.B.CH1WID = 0;
    HW.PCM.TXC.B.CH1EN = 1;

    // execute reset sequence
    HW.CM[CM_PCM].DIV.B = pcm_cm_div;
    HW.CM[CM_PCM].CTL.B = pcm_cm_ctl;
    HW.PCM.MODE.B = mode_master;
    HW.PCM.MODE.B.CLK_DIS = 0;
    HW.PCM.CS.B = init_cs;

    while (!HW.PCM.CS.B.SYNC);
    HW.PCM.CS.B.SYNC = 0;
    while (HW.PCM.CS.B.SYNC);

    // configure slave mode and attach external interface
    HW.PCM.MODE.B.CLK_DIS = 1;
    HW.PCM.MODE.B = mode_slave;

    memory_barrier();
    gpio_configure(28, Alt2);
    gpio_configure(29, Alt2);
    gpio_configure(30, Alt2);
    gpio_configure(31, Alt2);
    memory_barrier();

    HW.PCM.MODE.B.CLK_DIS = 0;

    memory_barrier();
}


static inline int spisl_poll(int num)
{
    if (num <= 0) return 1;
    return HW.PCM.CS.B.RXD;
}


static inline uint8_t spisl_read(void)
{
    while (!HW.PCM.CS.B.RXD);
    return HW.PCM.FIFO;
}


static inline void spisl_write(uint8_t data)
{
    uint8_t dummy;
    while (!HW.PCM.CS.B.TXD);
    HW.PCM.FIFO = data;
    while (HW.PCM.CS.B.RXD) dummy = HW.PCM.FIFO;
    (void)dummy;
}


static inline void spisl_flush()
{
    while (!HW.PCM.CS.B.TXE);
}



static inline void spisl_synchronize(void)
{
    uint8_t marker = 0x81;
    uint8_t incoming;
    int cnt = 0;

    incoming = spisl_read();
    while (cnt++ < 10) {
        if (incoming != marker) {
            HW.PCM.MODE.B.CLK_DIS = 1;
            st_delay(ST_1us);
            cnt = 0;
            HW.PCM.MODE.B.CLK_DIS = 0;
        }
        incoming = spisl_read();
    }

    spisl_write(marker);

    marker ^= 0xff;

    while (incoming != marker) incoming = spisl_read();
}

#endif